1. Field of the Invention
The invention relates to a semiconductor device, and more particularly, to a plastic ball grid array (referred to hereinafter as PBGA)-type semiconductor device constructed such that a semiconductor chip is surface mounted on a resin substrate thereof, the resin substrate is provided with solder ball terminals for connection with a mother board, and further the semiconductor chip is sealed with a resin.
2. Description of the Related Art
PBGA-type semiconductor devices have been in widespread use for electronic equipment of miniature size including portable communication equipment such as portable telephones, pager units, and the like because the devices can be mounted in a high density contributing to miniaturization of the equipment, and in addition, have excellent electrical characteristics.
FIG. 11 is a sectional view showing the construction of a conventional PBGA-type semiconductor device, and FIG. 12 is a plan view showing the front surface of a resin substrate, a component of the semiconductor device.
The conventional PBGA-type semiconductor device shown in these figures is described hereinafter in accordance with the sequence of a fabrication process thereof.
A resin substrate 1 is used as the substrate for mounting a semiconductor chip thereon. The resin substrate 1 is formed into a substantially square shape as seen in the plan view, and is composed of a resin material on the order of 0.2 mm in thickness. As the material for forming the resin substrate 1, a resin material such as epoxy resin, polyimide resin, and the like is cited. However, epoxy resin impregnated with glass fiber is preferably to be used.
The front and back surfaces of the resin substrate 1 are provided with a copper foil layer with about 18 .mu.m in thickness, and further, with a plurality of through holes 2 formed by drilling means such as a cutting drill, or the like.
Then, all the surfaces of the resin substrate 1 including the sidewall faces of the through holes 2 are rinsed, and coated with a copper-plated layer formed by an electroless plating process and an electroplating process. The copper-plated layer is formed inside the through holes 2 as well.
Subsequently, an etching treatment is applied to the resin substrate 1 using an etching mask pattern and an etchant.
As shown in FIG. 12, as a result of the etching treatment, a die pattern 3, connection electrodes 4, power-source related connection electrodes 4a, conduction paths 5 for electrically connecting the connection electrodes 4 with the through holes 2, conduction paths 6 for electrically connecting the power-source related connection electrodes 4a with the through holes 2, and conduction paths 7 for electrically connecting the power-source related connection electrodes 4a with the die pattern 3 are formed of the copper-plated layer, and disposed on the front surface of the resin substrate 1.
The die pattern 3 is provided to keep the body of a semiconductor chip 8 at the same potential as that of the power-source related connection electrodes 4a so that the semiconductor chip 8 will not be subjected to noise effects as described hereinafter, and also to form a path for the radiation of heat generated in the semiconductor chip 8.
The connection electrodes 4 are provided for electrical connection with respective electrodes of the semiconductor chip 8, and the power-source related connection electrodes 4a for electrical connection with power-source electrodes of the semiconductor chip 8.
Meanwhile, by the etching treatment as described above, pad electrodes 11 for soldering solder ball terminals 10 thereto, composed of the copper-plated layer, are formed on the back surface of the resin substrate 1 as shown in FIG. 11. Conduction paths 13 for electrically connecting the respective pad electrodes with each of the through holes 2, composed of the copper-plated layer, are also formed on the back surface of the resin substrate 1 by the etching treatment.
The connection electrodes 4 and the pad electrodes 11, as described above, are electrically connected with one another via the copper-plated layer formed inside the through holes 2. The power source related connection electrodes 4a and the pad electrodes 11 are also electrically connected with one another via the copper-plated layer formed inside the through holes 2.
Thereafter, insulating resin films 15, composed of a material such as epoxy resin, or the like, are formed on the front and back surfaces of the resin substrate 1 which have been treated by the etching treatment. The insulating resin films 15 are provided for protection of the respective conduction paths 5, 6, 7, and 13 as described above. In FIG. 12, a region where the insulating resin film 15 is formed is indicated by hatching.
In this instance, the insulating resin film 15 is not formed in the center area on the front surface of the resin substrate 1, exposing the die pattern 3, the connection electrodes 4, and the power-source related connection electrodes 4a. The hatched region shown in FIG. 12 is the region where the insulating resin film 15 is formed. The insulating resin film 15 is not formed in regions for the pad electrodes 11 formed on the back surface of the resin substrate 1, exposing the pad electrodes 11.
Thereafter, a nickel (Ni)-plated layer (not shown) with about 2 to 5 .mu.m in thickness is formed on the surfaces of the die pattern 3, connection electrodes 4, power-source related connection electrodes 4a, and pad electrodes 11, which are all exposed from the insulating resin film 15, and further, a gold (Au)-plated layer (not shown) having excellent conductivity is formed in a thickness on the order of 0.5 .mu.m on the front surface of the nickel (Ni)-plated layer.
The semiconductor chip 8 is fixedly attached onto the gold (Au)-plated layer formed over the die pattern 3 with the use of an electrically conductive adhesive 16 composed of a resin compound such as epoxy resin, phenol resin, or the like as the main component thereof.
Subsequently, signal related electrodes and the power-source related electrodes (either of the ones on the ground side or the power-source side) of the semiconductor chip 8 are connected with the connection electrodes 4 via connecting wires 17. Further, the power-source related electrodes of the semiconductor chip 8, on the side not connected with the connection electrodes 4, are connected with the power-source related connection electrodes 4a via connecting wires 17. As a material for the connecting wires 17, a gold (Au) wire excellent in conductivity is used.
Then, the semiconductor chip 8 and the connecting wires 17 are sealed by a transfer molding process using a thermosetting sealing resin 18 to shield from light and protect the semiconductor chip 8.
The solder ball terminals 10 are fused to the each pad electrode 11 formed on the back surface of the resin substrate 1. The solder ball terminals 10 are used for electrical connection with wiring patterns on the mother board substrate (not shown).
With the conventional semiconductor device as described above, the die pattern 3 is formed in the center area on the front surface of the resin substrate 1, and the semiconductor chip 8 is fixedly attached onto the die pattern 3 with the use of the electrically conductive adhesive 16. Since the die pattern 3 is electrically continuous with the power-source related connection electrodes 4a, the body of the semiconductor chip 8 will be at the same potential as that of the power-source related connection electrodes 4a via the electrically conductive adhesive 16 and the die pattern 3. As a result, the semiconductor chip 8 can be shielded so as to be protected from ambient noise.
Further, the die pattern 3 is electrically continuous with the solder ball terminals 10 via the power-source related connection electrodes 4a, the conduction paths 6, the copper-plated layer inside the through holes 2, and the pad electrodes 11. As the solder ball terminals 10 will be electrically connected with wiring patterns formed on the mother board of various pieces of electronic equipment, heat generated in the semiconductor chip 8 is radiated to the mother boards via a path from the die pattern 3 to the solder ball terminals 10.
Although the die pattern 3 has functions as described above, it has been also a factor for causing the following problem.
That is, the solder ball terminals 10 are connected with wiring patterns formed on the mother board of various pieces of electronic equipment by the reflow soldering process. In this case, the semiconductor device as a whole is heated up to a temperature higher than the melting point of the solder balls, and when the temperature of the semiconductor device as a whole reaches not lower than 200.degree. C., a shearing force is caused to occur between the underside surface of the semiconductor chip 8 and the resin substrate 1 due to a difference in thermal expansion coefficient therebetween, occasionally causing exfoliation at the interface therebetween where adhesion force is weak.
There have been many occurrences of exfoliation, particularly, at the interface between the front surface of the die pattern 3, composed of a metallic material, and the electrically conductive adhesive 16 composed of a resin compound such as epoxy resin, phenol resin, or the like as the main component thereof, due to weak adhesion force therebetween.
Furthermore, in the case where a gold (Au)-plated layer, which is an inert metallic material, is formed on the front surface of the die pattern 3, adhesion force between the front surface of the die pattern 3 and the electrically conductive adhesive 16, composed of a resin compound such as epoxy resin, phenol resin, or the like as the main component thereof, has been further weakened, frequently causing exfoliation.
Also, in the case where minute air bubbles are present at an interface between the die pattern 3 and the electrically conductive adhesive 16, there has been a fear of the air bubbles expanding upon heating during the reflow soldering process, resulting also in the occurrence of exfoliation.
As the resin substrate 1 is absorbent of and permeable to moisture, the moisture in the resin substrate 1 flows into a gap defined between the die pattern 3 and the electrically conductive adhesive 16 as a result of exfoliation, further spreading the area of exfoliation.
As there is a fear of such exfoliation occurring between the die pattern 3 and the electrically conductive adhesive 16 causing deformation of the resin substrate 1, resulting in a break in wirings between the electrodes on the resin substrate 1 and the electrodes on the side of the semiconductor chip 8, reliability of the semiconductor device has been impaired.